### The Multiplier

Having looked at just how large the ROM [and, by implication, the forthcoming RAM] are going to be, suddenly another 350 gates for a dedicated multiplier don't seem so bad. Of course, this one only works for unsigned numbers, but it's not too hard to add in the hardware for signed multiplication as well. I'll either do that by sign-extending the inputs or by something slightly more complex, but I don't quite have time to manage it tonight.

You will note [and I use the word

*will*rather speculatively, I realize] that the multiplier is a bit more complex than it needs to be. The accumulator is obvious and minimal, but the circuits that feed into it are actually optimized for speed. I could just have done the simple 64-ball-paths crossbar of the 8 bits of each input. That would always have completed its calculations in a predictable amount of time [(64 balls) + (arg input, reset, and readout)], but it would often have spent lots of its time multiplying zero by zero. The design I decided to use instead recognizes zeroes in Op0 and skips all processing [including state machine reset] on those bits. Of course, the state machines used to do that recognition aren't free. The processing time is (10 balls per bit) + (the other stuff). That gives us a worst case [multiplying by -1] of (80 balls) + (all the other stuff), but that'll be quite rare. It's made rarer still by the fact that any constant -1 multiplications can just be replaced by complements, which should be significantly faster.