You thought the ROM was big?

You thought the ROM was big? Meet the RAM.

That's actually a link to the state machine I used to test the RAM itself, so that you can see what its interface is like.

Note that I'm using a ROM to hold a sequence of simple instructions [here just addresses and data], just as I did in the PCU test. While my designs are getting bigger and more complicated, I'm able to leverage the components I already trust in order to test the new ones.

With the creation of this component, I now have [in a half-assed way] all the parts that one would need to make a CPU. All the rest is pretty much glue logic and some instruction-decode state machines. However, most of the components need a little tweaking before I can really put them all together. For example, the ALU doesn't have a carry-in signal yet, the multiplier doesn't give 16-bit results for signed inputs, the shifter doesn't produce the precise overflow behavior that I want, and they've got a variety of different control interfaces.

My plan for the rest of Step 3 is:

• Improve bcd's simulator interface, to make testing easier and faster;
• Decide on a standard control paradigm for all components;
• Go through all the components, one by one, and make the necessary improvements;
• [Finally!] put it all together and proceed to Step 4: write+run test code for the complete CPU.

[Image] RAM test

Click on the yellow boxes to see inside them.

[Image] RAM block 2 256x8

Click on the yellow boxes to see inside them.

[Image] RAM block 2 16x8

Click on the yellow boxes to see inside them.

[Image] 1 to 32

Click on the yellow boxes to see inside them.

No new diagrams this week.

Nor for the next couple of weeks, I expect. I've been improving bcd [my CAD program; it stands for Ball Computer Designer] instead of using it.

When I was working on the huge ROM diagram [with all its thousand+ connections], I got so sick of connecting ports by hand that I ended up doing much of the work in the raw XML files in which I store my database. What with all the vim macros, search-and-replace regexps, and copy-and-pasting, I'm not sure I actually saved any time. Still, I think I made fewer mistakes that way than if I'd used bcd, and I had to do far less mousing.

It occurred to me that much of the work in such a diagram is quite mechanical, and could be done automatically by a properly-trained tool. Thus I've now added a connection-extrapolation feature to bcd. I make and select two connections, and it guesses where the next [and subsequent] connections should go. I'll probably do the same thing for ports and cell instances before I get back to work, as my next diagram will probably be the RAM. Think: like the ROM, but with half again as many components and connections. Whee!