Sunday, June 26, 2005

New improved ALU

Ever have to go back to the very first code you'd ever written in a language...code that you'd optimized quite a bit...code that you hadn't commented enough...and try to add in a tiny new feature?

Sucks, don't it?

Well, that's just what I've done here. The ALU was my first major design using BCD. It contains the most complicated logic of any design, and I stupidly optimized the heck out of it. The design is quite contorted in various places...and I wasn't even that good at ball-logic-based design, so I ended up throwing away some of the benefits of the optimization through odd choices in other parts of the design.

However, it works, so I'm not messing with it too much. I've removed a couple of redundant gates, but otherwise all I did was add support for one new opcode: SubC. This is the subtract-with-carry-in that you'd use to do a higher-byte subtraction, where the carry-in is from the condition code register. On the bottom byte, you force it to be one [since we're doing twos-complement math].

Here it is, in all its twisted glory. You have my apologies about the size of the images [especially that one page deeper than the above link], but if I make them any smaller, there's no way to read the details. I recommend using a web browser that allows you to zoom in and out at will [I use Opera].

Next up, I've got to fix the overflow behavior in the shifter. Huh; I just went to make the word "shifter" a link, and realized that I've never put up any images of the two shifters I've designed. Well, perhaps I'll use them as filler if I'm too busy to create the final version.

[Image] ALU with SubC test

Click on the yellow boxes to see inside them.








[Image] ALU with SubC

Click on the yellow boxes to see inside them.







Wednesday, June 15, 2005

The Signed Multiplier

Here's a test of a multiplier that can handle both signed and unsigned inputs, as promised. As I'd expected, there was an easier and faster way to do it than sign-extending the inputs. Since the sign extension would have produced either an 8-bit -1 or an 8-bit zero, if each high bit is nonzero I just have to multiply the other byte by -1 [which is as easy as a complement-and-add-one] and shift it by 8 bits [which is trivially done in the routing].

[Image] Signed Multiplier Test

Click on the yellow boxes to see inside them.








[Image] Signed Multiplier

Click on the yellow boxes to see inside them.